_ DEC-O-LOG for KN7AA _ DOL, KN7AA-O001, Memory config restrictions/Cache error corrrection routine APR 94 APPLICABILITY: This "O" coded FCO should be in stalled on all DEC 7XXX and DEC 10000-6XX sys tems, replacing all E2040-AA(all revs),E2040-AB (all revs) and E2040-YA (rev. A01, B01 and C01) CPU modules with new E2040-YA rev. D01 CPU module. These FCOs incorporate the following ECOs: (1) E2040-AB-TWO001 and (2) E2040-YA-TWO003. This FCO will also upgrade all 182 MHZ systems to 200 MHZ performance. PROBLEM & SYMPTOM: (1) System currently has certain memory configuration restrictions that are checked by console prior to booting the system. The console will display the following message "INVALID MEMORY INTERLEAVING- boot disallowed", when a boot is attempted on the system. (2) The Cache error correction routine does not prop erly correct cache signal bit errors. This problem has the potential to severely disrupt normal system operation. SOLUTION: Replace the E2040-AA(all revs); E2040-AB (all revs) and E2040-YA(Rev. A01,B01,C01) CPU modules as per a procedure (see below) with new E2040-YA Rev. D01 module, minimum revision must be D01. NOTE: All modules at Rev. D01 need a minimum Con sole version V2.5 QUICK CHECK: Verify that all System modules are E2040-YA at the minimum Rev. D01 and the Spares kits are at Rev D01. FCO KIT ORDERING: EQ-01694-01 1 E2040-YA CPU module at Rev. D01 or higher FA-05031-01 1 Field Application (FA) Document _ DOL, KN7AA-F002, T2028-AA LAMB module NOV 93 PROBLEM: The T2028-AA LAMB module only al- lows longword aligned addressing on the XMI. FIELD EFFECTIVITY: This "F" coded FCO will up grade all T2028-AA field spares. This FCO does not affect the systems. SOLUTION: Installation of a new LGA gate array will allow lower address bits (1,0) to be passed on to the XMI. This FCO will replace the field spares with revision "E*". QUICK CHECK: Look for revision "E*" on the T2028 module spare. FCO KIT ORDERING: EQ-01686-01 T2028-AA LAMB Module, Rev. "E*" FA-05022-01 FCO Document